location of R0-R15 in relation to ALU and RAM[0]-RAM[15]

[ouverson]

I'd like some clarification on the location of R0-R15 in relation to ALU and RAM[0]-RAM[15] memory registers.

Slides 16 through 22 indicates that R0-R15 are closer to the ALU (along with A and D registers) and distinct from RAM[0]-RAM[15].

I was under the impression (looking at the CPUEmulator) that the only registers near the ALU were the A and D registers. That R0-R15 were virtual representations of RAM[0]-RAM[15].

Thank you for help.

[ivant]

A, D and the PC are the only "true" registers in the HACK CPU and R0 to R15 are just names which the assembler associates with the first 16 words in RAM.

I haven't seen the slides so I lack the context. Perhaps this is a more conceptual view of the HACK architecture (not just the CPU) as a compilation target?

[ouverson]

Thank you, ivant, for confirmation.

[WBahn]

ouverson wrote

I'd like some clarification on the location of R0-R15 in relation to ALU and RAM[0]-RAM[15] memory registers.

Slides 16 through 22 indicates that R0-R15 are closer to the ALU (along with A and D registers) and distinct from RAM[0]-RAM[15].

I was under the impression (looking at the CPUEmulator) that the only registers near the ALU were the A and D registers. That R0-R15 were virtual representations of RAM[0]-RAM[15].

Thank you for help.

Slides 16-22 from where? There are lots of sites that have lots of slides related to Nand2Tetris. Are you talking about the Coursera Course? The slides on the nand2tetris.org site for this chapter? What?

A link to the slides in question is always a good idea.

My guess is that the slides at that point are talking about a typical memory hierarchy in which you have some number of registers on the CPU silicon die itself and then you have some type of cache, either on the die or located very close to it, then main memory, then some kind of storage. The Hack platform only has three registers (A, D, PC) and main memory. No cache and no storage.

[ouverson]

https://www.nand2tetris.org/course >

Project 4: Machine Language >

https://docs.wixstatic.com/ugd/56440f_12f488fe481344328506857e6a799f79.pdf

Thank you both for sharing about the PC register being one of the Hack platform registers.

[ivant]

These slides describe typical architecture. They are not describing the specifics of the HACK architecture.

[ouverson]

Roger that.