Posted by rick2047 on URL: http://nand2tetris-questions-and-answers-forum.52.s1.nabble.com/HDL-implementation-of-Bit-gate-tp1392879p1394413.html
ybakos wrote
If you follow the diagram in chapter 3, you'll figure it out.
Actually I followed exactly that, In the diagram the out pin is connected back to the Mux and the second input of mux is the in bit. Load is used as the select bit. That's exactly what I wrote in the code