Re: 8Mux16Way

Posted by cadet1620 on
URL: http://nand2tetris-questions-and-answers-forum.52.s1.nabble.com/8Mux16Way-tp4025685p4025706.html

goo wrote

Firstly my apologies. What I meant was Mux4Way16 and Mux8Way16.
Now I am getting an error on the out1 ( out(1) and out(16) bus width mismatch).
This is surprising since I have implemented Mux4Way16 from Mux16 chips
and that worked well. in that I have used similar code
Mux16(a=a,b=b,sel=sel[0],out=out1);

Think about what is happening on this line. out1 is being created, and internal wires are always created to match the width of the output to which they are connected. The error message says that out1 is a 1-bit bus (a single wire) so it must, therefore, have been created in an earlier statement in the HDL.

I prefer names that are somewhat descriptive; they make it harder to accidentally use duplicate names. I'd name the output from this mux "outAB" or something similar.

--Mark