Re: derive internal output to several gate inputs

Posted by cadet1620 on
URL: http://nand2tetris-questions-and-answers-forum.52.s1.nabble.com/derive-internal-output-to-several-gate-inputs-tp4025704p4025711.html

ysh443 wrote

on the appendix:
   Output Pins Each output pin of a part may feed one of the following destinations:
   * an output pin of the chip
   * an internal pin

The quote from the Appendix A is incorrect. It should read "may feed one or more of".

You do not need two muxes; what ybakos wrote is correct HDL and is accepted by the Hardware Simulator.

ybakos wrote

Mux4Way16(a=xandy ,b=xaddy ,c=nxandy ,d=nxaddy , sel[1]=no ,sel[0]=f , out=out, out[15]=ng, out[0..14]=zrox);

--Mark