Re: RAM8 Script test pattern

Posted by cadet1620 on
URL: http://nand2tetris-questions-and-answers-forum.52.s1.nabble.com/RAM8-Script-test-pattern-tp4026159p4026162.html

gs99 wrote

cadet1620 wrote

The input side of RAM is synchronous-- the input only changes the RAM's data when a clock occurs. The output side is asynchronous-- whenever the address changes, the output data changes.

I'm confused.
I couldn't find these terms in chapter 3:
"input side", "synchronous", "output side", "asynchronous"

I thought all of this was controlled by the clock - synchronous.

Sorry, I should have said "combinational". You are correct that all the sequential logic in Nand2Tetris is synchronous. Asynchronous sequential logic is when you have feedback but no clocked storage elements like DFFs. Here's an example:

If you want to learn more about asynchronous circuits including how they are used to built a DFF, check out play-hooky.com. There's a lot of other interesting stuff on that site too.

By input side of the circuit I mean the logic between the chip inputs and the storage elements--the Registers. The output side is the logic between the storage elements and the chip output.

Since the input to the Registers can't be observed directly by the test, the only way to test the input circuitry is by clocking the chip so that the input is transferred (if it should be) to the output. Some aspects of the output circuit can be tested without clocking the chip. In particular, changing the address changes which Register's output should appear on the RAM8's output. That's what the evals are about.

How do those terms relate to these lines in the script?
Example A.
set in 11111,
set load 1,
set address 3,
tick,
output;
tock,
output;

This is testing that data gets stored in Register 3.

And how do they relate to these lines in the script?
Example B.
set address 1,
eval,                      
output;

This is testing that writing to some other Register did not affect Register 1.

What's the difference between "set address 3" in Example A and "set address 1" in Example B?
The main reason for setting the address is to change the contents of that memory, correct?
In a real computer, are things not being set within a clock cycle, as portrayed in Example A format?
The format of Example B seems to be "out of place".

Actually, there are greatly more reads from memory than there are writes.  During reads, clocking the Registers has no effect; the RAM is acting completely combinationally. Although the Hack computer clocks the memory for every instruction, most real world computers do not. Real world memory systems are extremely complex, well beyond what can be dealt with here.

--Mark