Re: Special XOR for half-adder and full-adder

Posted by cadet1620 on Mar 02, 2016; 6:36pm
URL: http://nand2tetris-questions-and-answers-forum.52.s1.nabble.com/Special-XOR-for-half-adder-and-full-adder-tp4029600p4029607.html

cadet1620 wrote

Use 9 Nor chips in the same circuit topology as your 9-Nand full adder.

jonk wrote

For all nine gates as NORs, I get the same output -- a full adder!

Nor gates, like Nand gates are universal primitives. There was a family of ICs in the 60's and early 70's called ECL whose natural gate was Nor. It was very fast but also power hungry.

De Morgan's law for Nand says

    Nand( a, b ) = Not( Nand( Not(a), Not(b) ) )

The normal canonical design and optimization tools like Karnaugh maps all work backwards. You need to consider inverted input and output values. This makes designing with Nors harder than with Nands—it helps if you brain is abNORmally wired.

This 9 gate design for full adder has always been one of my favorites because it is identical with either Nand or Nor gates.

Too bad it is too slow (6 gate delays) that it is not used in practical hardware designs.

--Mark