Re: Prolog implementation

Posted by ivant on Jul 04, 2018; 9:58am
URL: http://nand2tetris-questions-and-answers-forum.52.s1.nabble.com/Prolog-implementation-tp4031310p4032195.html

My Prolog skills are very rusty. Last time I played with it was around 1995 I think.

In any case it shouldn't be too hard to simulate the clock as a parameter to sequential circuit, with values TICK (or RISING), meaning the clock value is changing from 0 to 1, TOCK (or FALLING) for when the value is changing from 1 to 0. The clock should only be changing in the main "loop"; all other gates and circuits should just pass it through. DFFs should be the only gates which do care about the clock's value.