ALU Implementation - the road traveled thus far

Posted by ouverson on Jun 05, 2019; 1:02pm
URL: http://nand2tetris-questions-and-answers-forum.52.s1.nabble.com/ALU-Implementation-the-road-traveled-thus-far-tp4033278.html

Hello,

I'm not really looking for an answer to a question; but rather a thumbs-up that I'm on the right track regarding my thoughts on ALU implementation.

My initial thoughts on ALU implementation were:
* Am I to view the table with inputs and outputs as a Truth Table? If so, how am I to think about implementation within that context?
* It looks as if there are many "if statements" staring me in the face: if this, and if this, then this implementation to achieve outputs. Not sure how I would wire-up chips to achieve this logic.
* I'm sure I'm supposed to be using previously implemented chips/gates; not only the ones from chapter/week 2, but from chapter/week 1. Let me take a look at all the previously implemented chips/gates and see which ones would stand out; many did.
* This Two's Complement thing is important. How exactly I'm not sure; it will probably become apparent/obvious.
* As with other chip/gate implementation there's probably a "key" (some tool such as canonical representation) that turns the lock; finding the key is half the fun (and frustration) LOL.

The road traveled thus far:

Starting with a primitive Nand gate I have built increasing complex chips/gates.

The tools I have used:
* Truth Table
* Canonical Representation (a type of Boolean Expression)
* Some basic Algebraic rules

I did a study of chip/gate progression with the thought that I would be able to see a pattern and also see which chips/gates would probably be used in my ALU implementation; maybe all of them?!

How to take all this and begin the ALU implementation? Not sure what the first step should be.