Login  Register

Re: ALU Implementation - the road traveled thus far

Posted by ivant on Jun 07, 2019; 1:43pm
URL: http://nand2tetris-questions-and-answers-forum.52.s1.nabble.com/ALU-Implementation-the-road-traveled-thus-far-tp4033278p4033288.html

ouverson wrote
The only way I could think of to handle the ng behavior was to take the MSB of the last Mux16 and pipe it into another Mux; as the output would be negative if the MSB was 1. Though I'm not 100% on that.
Can you make a truth table for that Mux? What does it tell you?

ouverson wrote
Not sure how to handle the zr.
For the output to be zero, its every bit has to be zero, right? Let's suppose that the output is just 2 bit-wide. You'll need to make a circuit which has the following properties:

o[1] o[0] | zr
-----------+---
  0      0  |  1
  0      1  |  0
  1      0  |  0
  1      1  |  0

How would you do that?

How about for 4 bits?

o[3] o[2] o[1] o[0] | zr
-----------------------+---
   0     0     0     0  |  1
   x     x      x     x  |  0