Re: Why we need the DFF to build the Register

Posted by geraldli on Mar 26, 2020; 9:07am
URL: http://nand2tetris-questions-and-answers-forum.52.s1.nabble.com/Why-we-need-the-DFF-to-build-the-Register-tp4034340p4034342.html

Thanks for the reply.

The "stabilizes" thing might be the reason. I do agree hardware design is much easier with clock.

However. I still don't think the clock is something that we "must have" when design the register.

From the link here, we can see there exists asynchronous sequential logic. It's possible to design the
out[t] = in[t - 1] without clock:
https://en.wikipedia.org/wiki/Asynchronous_circuit.
https://en.wikipedia.org/wiki/Sequential_logic.

So my understanding is:
1. The sequential logic can be done without clock. Whenever circuit can holds previous state with an inner memory,  the sequential logic can be done.
2. It's much easier to implement the sequential logic with clock in electronics aspect. It's the main choice in today's industrial design.
3. As for register, since the function of which is just to remember the inputs, the clock here looks like a compromised choice.