Re: Simplest possible ALU implementation using only previously-defined chips?

Posted by WBahn on
URL: http://nand2tetris-questions-and-answers-forum.52.s1.nabble.com/Simplest-possible-ALU-implementation-using-only-previously-defined-chips-tp4034757p4034758.html

That depends entirely one what your metric is for "simple" and "elegant".

You are defining "simplest" as the fewest lines of code in the PARTS section of the HDL file.

Okay, which HDL file? Just the ALU.hdl? If your ALU.hdl had, say, 13 parts but those parts totaled out having 100 parts, is that really simpler than an ALU.hdl file that had 15 parts but those totaled out having only 90?

FWIW, the Hack hardware really doesn't lend itself to these kinds of efforts. In CMOS, a Nand gate uses four transistors. So consider an And and an Or gate. The And gate is two Nand gates (8 transistors) while the Or gate is likely implemented by most people using one And gate and three Not gates, which total out to five Nand gates (20 transistors). But each is just one "part" in an HDL file. In reality, both and And and an Or are made (in CMOS) using 6 transistors.

I'm pretty sure I know which part you think is missing and I suspect the reason that it is left out is that the authors wanted one portion of the logic to require some thought as to how to identify a need for a function that isn't explicitly specified and then figure out how to implement it.

But there are other "missing" parts that would make the ALU quite a bit smaller and faster overall.