Re: Full-Adder (3 Gates)

Posted by WBahn on Jul 15, 2021; 2:05am
URL: http://nand2tetris-questions-and-answers-forum.52.s1.nabble.com/Full-Adder-3-Gates-tp4029696p4036148.html

As noted earlier in the thread, the goal is to help you through just the specific problem you are having at the moment so that you can still do the bulk of the work on your own. Just saying that you got a comparison failure after trying something doesn't give us a specific problem to help you through.

What was the comparison failure? What line? What does your .out file have on that line? And, for easier reference, what is the .cmp contents on that line?

Where is the difference? Do you agree that what the .cmp file has is correct? If not, that is probably the root of the problem, namely that you don't yet quite understand what the chip is supposed to be doing, let alone how it is or is not going about doing it. Once you agree that the .cmp file is correct, then walk through your logic is see if you agree that your design is producing what is in the .out file. Once you agree with that, you are in a pretty good position to work out where your design is going astray and not producing the correct output for that set of input.