Re: HDL Specification

Posted by WBahn on Jul 22, 2021; 8:25pm
URL: http://nand2tetris-questions-and-answers-forum.52.s1.nabble.com/HDL-Specification-tp4036164p4036174.html

I'm not aware of any formal specification that exists. It shouldn't be hard to reverse engineer if you want to -- of course you might miss subtle things that aren't apparent in the example code you use, but other than the trick of using multiple instances of chip output ports to work around the inability to do subbussing on internal nodes, I don't think there is much subtlety involved.