Re: Number of NAND gates in the HACK computer

Posted by dolomiti7 on Jan 09, 2025; 4:07pm
URL: http://nand2tetris-questions-and-answers-forum.52.s1.nabble.com/Number-of-NAND-gates-in-the-HACK-computer-tp4038281p4038283.html

Yes, memory is expensive in terms of gates/transistors. A significant amount of transistors in modern CPUs is actually related to the embedded cache memory. However, real life memory (DRAM) is implemented more efficiently in terms of transistors (not based on gates).

But your list is far from optimal. A full adder can be done with 9 NAND gates for example, a XOR and 2x1 MUX with 4 NAND gates each. That will be cascading through to the more complex chips. Not even considering more sophisticated (global) optimizations that are applied by EDA tools. Effectively you would need much less gates. That is however out of the scope of nand2tetris.