http://nand2tetris-questions-and-answers-forum.52.s1.nabble.com/PC-Counter-tp687060p716570.html
----- Original Message -----
Sent: Tuesday, March 30, 2010 6:39
PM
Subject: Re: PC Counter
Not necessarily. Functionality really is summed up by the chip
specification (see the nested 'if' statements?).
If you're having
trouble realizing the PC, note that the order of the if statements and the
order of your circuitry are related.
I've reached another impasse related to the PC,
as it is used in the CPU implementation. I am unsure if the control logic we
are required to build is supposed to manipulate the inc function of the
counter. If I just set this value to 'true', the counter will automatically
increment after each clock cycle until a jump
directive is issued. Then it 'skips' a heartbeat before resuming counting
upwards, but of course this means it is now out of sync with the program. It
seems as though it needs to be goosed to continue counting like it is supposed
to. I thought of trying to tie in the jump logic to the control of the pc
counter but the problem is the circuit that causes the counter to load a new
address retains its state until another ALU operation resets it. So if for
example the next operation is a load operation into the A register, jump logic
will retain its state and not be very useful in helping to control the pc
counter. I looked at the results of the compare file in the test script and it
is the value of the pc counter that causes the test to break down. I've kind
of thrown my hands up at this point, which is disappointing because otherwise
I think I have figured out how to wire everything up.