tst files with strange input

[zachi]

Hi
I am trying to run the test for the Register chip.
Some of the steps in the test file has strange input like

set in -32123,
set load 0,
tick,
output;

and
set in %B0000000000000001,
set load 0,
tick,
output;


Can you explain what is this type of input?

Another question,
Wen I am loading BIT chip which uses DFF the Clock icon is not enable (steel green).
When I am running the test script, it alwys stops when clock reaches 4, then I need to press on the >> for each tick/tock.
Since there are many clock ticks in each tests it is not an option.
what is going wrong in my tests?

Zachi

[cadet1620]

zachi wrote

set in -32123,

2's complement integer. See chapter 2.

set in %B0000000000000001,

Binary value.

Another question,
Wen I am loading BIT chip which uses DFF the Clock icon is not enable (steel green).
When I am running the test script, it alwys stops when clock reaches 4, then I need to press on the >> for each tick/tock.
Since there are many clock ticks in each tests it is not an option.
what is going wrong in my tests?

Usually when the Hardware Simulator does strange things it is because of unconnected input or output pins, or internal wires that are not connected to any input. These sorts of errors may also cause problems with your Register since it uses Bit.

Also, make sure that the only HDL files in your projects/03/a directory are the ones for chapter 3. If you are trying to use your chips from chapters 1 and 2, you can run into memory limitations with the RAM chips. Likewise, don't copy your chips from 03/a into 03/b.

If you can't find the problem, feel free to email me your Bit.hdl and I'll be happy to look at it for you.

--Mark