A matter of elegance & efficiency

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A matter of elegance & efficiency

Fyodor X
Hi!

If I were to implement the chips in real life using only prepackaged NAND gates, would it be better if I stick to them? I mean, is it better to implement the AND using two NANDs or using one NAND and one NOT built by me? In this example you may not see the benefit of the former because you can implement a NOT with just a NAND. As the complexity of project grows, you start to see some redundancy and you can design a chip that uses less primitives overall.

Maybe I'm losing the point of abstraction in trying so hard to use only primitives, but in the case it's more efficient it's a trade-off you may be willing to make.

In any case, thank you so much for this wonderful course!
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Re: A matter of elegance & efficiency

cadet1620
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Fyodor X wrote
If I were to implement the chips in real life using only prepackaged NAND gates, would it be better if I stick to them? I mean, is it better to implement the AND using two NANDs or using one NAND and one NOT built by me? In this example you may not see the benefit of the former because you can implement a NOT with just a NAND. As the complexity of project grows, you start to see some redundancy and you can design a chip that uses less primitives overall.

Maybe I'm losing the point of abstraction in trying so hard to use only primitives, but in the case it's more efficient it's a trade-off you may be willing to make.

In any case, thank you so much for this wonderful course!
See this post for a Nand only CPU.

Part of the problem is that the most efficient primitive is a moving target. When I was learning this in the late 70s, TTL and ECL were the most popular logic IC families, with N-input Nand and N-input Nor as their respective primitive gates.  (Not being a 1-input Nand or Nor.)

These days CMOS is top dog, with Nand, Nor and Transmission Gate as its primitive elements. A transmission gate is like a solid state relay. Mixing transmission gates with Nand and Nor can result in even better optimizations for gates like Xor and Mux. (Mux is 2 transmission gates and a Not -- 6 transistors.)

You can make even more complex gates in CMOS that are almost as fast as a single Nand. An example is an And-Or-Invert gate
    and-or-invert gate

Also worth noting: if you are using prepackaged ICs like 74x00 series TTL or 4000A series CMOS, there is significant overhead for input protection and output drivers. You are best off to use the IC that best matches your circuit. Use an And IC if you need an And and an adder if you need to add.

--Mark