Nicolas wrote
Hint: I did this using 1081 Nand gates, yet it can be done with less.
For people who didn't follow this, Nicolas is talking about gate count—the number of Nand gates that would result if each of the abstracted chips in his ALU was replaced with its equivalent circuit made of Nand gates.
If you want to do gate counting on your project 3 chips, use 9 Nands for DFF. You will find that the memory chips completely overwhelm the rest of the computer.
Don't get too hung up on optimization. The point is to learn how to use abstraction. A beer inspired and coffee fueled evening and early morning resulted in a 466-gate ALU: Why we like abstraction, but I sure don't recommend this design approach!
Besides, what is optimization for TECS? I've optimized Mux down to 3 lines.
Xor(a=a, b=b, out=x); // (If you turn this in for your Mux,
And(a=x, b=sel, out=y); // your teacher will ask you how it
Xor(a=a, b=y, out=out); // works!)
This isn't too useful, however. Its gate count is high and it's full of
hazard glitches.
--Mark