Almost

[Mike D]

I put together an AND gate via the NAND and Inverter components and all works fine until the last test where the input is 1,1 which should produce output of 1.

This is the code I used


 */

CHIP And {

    IN  a, b;
    OUT out;

    PARTS:
        [Working code removed by admin.]
}

[cadet1620]

My guess is that your Not.hdl is not working.   You can rename your Not.hdl to something else and then your And.hdl will use the built-in Not.  See if your And works; if so, you know that your Not isn't working, so you'll need to debug it.

--Mark