fweyt01 wrote
Is there a generic method to find how the NAND- or NOR-only configuration from a certain type of gate can be found? For example can I calculate the NAND-only version of a XNOR?
See Book section 1.1.1
Canonical Representation. This gives you an AND-OR equation for the function. There's a Boolean algebra law called De Morgan's law. It lets you replace the Ands and Or with Nands:
De Morgan's laws:
~(x | y) = ~x & ~y
~(x & y) = ~x | ~y
x | y = ~(~x & ~y)
x & y = ~(~x | ~y)
Converting AND-OR to NAND-NAND:
a&b | c&d = x | y Substitute a&b = x, c&d = y
= ~ (~x & ~y) De Morgan's law
= ~ (~(a&b) & ~(c&d)) Rev. subst. a&b = x, c&d = y
There is a problem if you have more than 2 inputs to the function. You may require Nands with more than 2 inputs. For real hardware you can build wider Nand gates, up to a reasonable number of inputs, but if you want to implement using
only 2-input Nands you end up with lots of cascaded Nands to make Nands with more inputs.
Reducing to Nor gates involves making a OR-AND representation of the function, which involves making OR terms for the 0 outputs; it's like deriving the normal canonical but all the inputs and outputs are inverted. De Morgan lets you convert the OR-AND to NOR-NOR.
The canonical forms for both Nands and Nors can be minimized using Karnaugh Maps. Sometimes there are smaller solutions than the AND-OR or OR-AND forms. For instance the smallest Xor is 4 Nand gates and the smallest Xnor is 4 Nor gates.
--Mark
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