Canonical Representation Question

[ismithers]

Hi all,

I have just done the Mux4Way16 chip, but I did get a bit stuck and part of my attempt to work out how to create it was to write down the canonical representation of it and implement that. Not sure how to use the same notation as the book, so I will do it as best as possible, but instead of ā for 'not a' I will use !a.

a.!sel[0].!sel[1] + b.!sel[0].sel[1] + c.sel[0].!sel[1] + d.sel[0].sel[1]

So I went about implementing that, but ran into an issue with the bus sizes. For example take the first function:
        Not(in=sel[0], out=notSel0);
        Not(in=sel[1], out=notSel1);

        And(a=notSel0, b=notSel1, out=unSel);
        And(a=a, b=unSel, out=r0); // Fails because a is multi-bit.

So I've made a mistake somewhere, and am wondering if working out the canonical representation is a good way to figure out how to create the chip? It has worked for me on smaller chips, which are less complex, but now I get to something like this it seems to have lead me on a path that would require me to do these operations n-bit times. Any thoughts appreciated, maybe someone sees where I went wrong.

Thanks!
Ian

[cadet1620]

You're right on both counts.  

Your canonical analysis is correct, and HDL will require to do all the Ands and Ors 16 times each, once for each bit. And then you finally need some way to get all these single bit results connected to the 16-bit out. The final Or would be something like
    Or16(a[0]=ab0, b[0]=cd0, a[1]=ab1, b[1]=cd1, ... out=out);
Mux8Way16 will be even worse using canonical representation.

Think about how to use 3 Mux16 chips to make your Mux4Way16. A similar idea can then be used to make your Mux8Way16. This is discussed quite a bit in the forum. Search for "Mux4way16 Mux16".

--Mark

[ismithers]

Hi Mark,

Thanks for that reply. I have actually solved the Mux4Way16 as you mention using 3x Mux16 chips as you say, but what is the right way to get to that conclusion using the logic presented in the book. Am I missing something obvious?

Thanks,
Ian

[cadet1620]

ismithers wrote

Thanks for that reply. I have actually solved the Mux4Way16 as you mention using 3x Mux16 chips as you say, but what is the right way to get to that conclusion using the logic presented in the book. Am I missing something obvious?

You are not missing anything obvious. Canonical representation and Karnaugh maps only give you an algorithmic way to solve/simplify fairly small circuits. You are now running into the "art" aspects of design -- the abstraction that N2T is trying to teach.

--Mark