Chip Not4 is not found in the working and built in folders

[Infidian]

Hi all.
I've been tasked to implement Not16 but I've decided to create a chip called Not4 that has a 4 bit output and then use four Not4 gates in my Not16 implementation. The reason I'm doing this is purely for documentation purposes. I'm required to document all of my chips and with the software I'm required to use it would take a long time to document a chip with 16 Not gates. It's far more feasible to document a chip with 4 not gates and then document Not16 with four Not4 gates.

Anyway, I have no problems loading my Not4 chip, but when I try to load my Not16 I get the error 'Chip Not4 is not found in the working and builtin folders', when it's located in project01.

In case there's spaghetti code, I would really appreciate if someone could point out what I've done wrong. I have referred to appendix A, but I don't see anything that I have gotten wrong.

Here is my Not4 chip:
// Not4.hdl
// @Author [redacted]
// @Last Modified 02.10.2021

/**
 * 4-bit Not:
 * for i=0..3: out[i] = not in[i]
 */

CHIP Not4 {
        IN in[4];
        OUT out[4];
       
        PARTS:
        Not(in=in[0], out=out[0]);
        Not(in=in[1], out=out[1]);
        Not(in=in[2], out=out[2]);
        Not(in=in[3], out=out[3]);
}

And here is my Not16 chip:
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/01/Not16.hdl

/**
 * 16-bit Not:
 * for i=0..15: out[i] = not in[i]
 */

CHIP Not16 {
    IN in[16];
    OUT out[16];

    PARTS:
    // Put your code here:
        Not4(in[0..3]=in, out[0..3]=out);
        Not4(in[4..7]=in, out[4..7]=out);
        Not4(in[8..11]=in, out[8..11]=out);
        Not4(in[12..15]=in, out[12..15]=out);
}

[WBahn]

The thing that jumps out at me is that in your Not16 gate you are trying to connect 4 bits of an input or output pin on each Not4 to a 16 bit signal. Fix that and see if there is still a problem.

[Infidian]

EDIT:*

Nevermind, I understand what you mean! I was assigning the bits on the left side when they needed to be on the right. Durr!!

Thanks so much!

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Original Post

I watched this video from the Nand2Tetris creators where they form a bus from smaller sub-buses, and that's what I was attempting to do.

Even though I'm trying to connect 4 bits to the 16 bit signal, am I not specifically selecting the 4 bits of the 16 bit bus that I want to copy the 4 bit values to?

Hence, 'out[0..3]=out';

Does this not assign the 4 bits 'out' to the first 4 bits of the 16bit bus?

[WBahn]

Good!

Did that solve the problem, or is it still unhappy about something else?