Emanuel Amit wrote
CHIP And {
IN a, b;
OUT out;
PARTS:
...
XOr(a=NotA, b=b, out=XOr1);
XOr(a=a, b=NotB, out=XOr2);
...
}
Your And gate is using Xor, and this is
exactly the problem that I first mentioned.
Your Xor gates are misspelled X
Or. Notice the upper case "O" in you commands.
These need to be
Xor(a=NotA, b=b, out=XOr1);
Xor(a=a, b=NotB, out=XOr2);
Because your And chip is broken, All chips that you try to load that use And, or use any chips that use And, will also fail to load.
You need to build and test the chips in the order they are presented in the book.
- Build Not using only Nand
- Build And using only Nand and Not
- Build Or using only Nand, Not and And
See
this post.
--Mark