Feedback on Edition 2 CPU project

[phayter]

This is a great project. And I have a couple suggestions.

1) Decoding the j-bits for PC control is the most interesting part of this project. The j-bits have a specific pattern which helps in their efficient decoding - this is clearly part of a well thought out design. Given the book's objectives I believe it would be a good idea to point this out; that is, that a carefully designed instruction can facilitate an economic hardware implementation. Without giving away the pleasure of the project's design, an additional sentence could be added in the next to last paragraph in section 5.3.1 to point this out.
     
Suggested sentence: As part of a well-designed instruction the j-bits have a specific pattern to facilitate hardware implementation.
 

2) I found the text in figure 5.8 misleading. The text implies that the ccccc..ccc instruction bits can be connected directly to the A register, Mux16, etc. Quoting: "...we don't specify which bits go where..." This misleading is further emphasized in the schematic which shows the ccccc....cc instruction coming in and the A register, Mux16, etc having c connections. When in reality these c-bits are not directly connected.

Suggestion: simply label these A register, Mux16, etc connections with some other letter.

[phayter]

Apologies this got posted in the wrong place.

[phayter]

Re-posted to hardware folder