HDL Syntax for multibit internal pins

[Seb]

Hi,
Trying to make the And16 after completing the Not16.hdl, I am facing a problem:
It is written in the appendix taht you can't subscript internal pins... so that means that i cant do a:
 "Nand(a=a[x], b=[x], out=tmp[x]);"
so, that's ok but if I do a  "Nand(a=a[y], b=[y], out=tmpY);" instead , i do not see how to use the previously made Not16...
Must I use basic Not 16 times or Is there something i do not understand ?

Thx

[cadet1620]

Seb wrote

Hi,
Trying to make the And16 after completing the Not16.hdl, I am facing a problem:
It is written in the appendix taht you can't subscript internal pins... so that means that i cant do a:
 "Nand(a=a[x], b=[x], out=tmp[x]);"
so, that's ok but if I do a  "Nand(a=a[y], b=[y], out=tmpY);" instead , i do not see how to use the previously made Not16...
Must I use basic Not 16 times or Is there something i do not understand ?

Thx

Have you made the And chip yet? It's much easier to replicate a single chip than a more complex structure.

I suppose you could could assign all the tempY signals to the individual inputs to your Not16, but that seems like too much typing:
    Not16(in[0]=temp0, in[1]=temp1, ... in[15]=temp15, out=out);

--Mark

[Seb]

hmm, thank you, that's right, i'm too stupid, as i just finish the Not16, i wanted to use it and so did not even think of using the simple And 16 times, :-D

[linuxford]

Hi,
I have created the Mux16 circuit and it simulates fine. I am working on the Mux4way16 and believe that on paper I have the solution utilizing three PARTS. However, I am having trouble it seems using the internal buses. I have tried a couple of approaches:

//Approach 1
XXX(.. etc .., out[16]=out1[16]);
... etc ...
XXX(a[16]=out1[16], ... etc ...);

//Approach 2
XXX(.. etc .., out[16]=x);
... etc ...
XXX(a[16]=x, ... etc ...);

Both "seem" to not be working. Could you please direct me. Thank you.

[cadet1620]

"a[16]=out1[16]" means connect wire 16 of bus a to wire 16 of bus out1. If you want to connect two buses to each other that are the same width, you simply need to write "a=out1".

Be sure to read Appendix A.5.3 for more info on buses.

--Mark

[kian]

Here is the pure Nand solution.
I find some features of this HDL strange because if you change the name of the input values, for example, I called them ATEMP and Btemp. It said my answers were wrong because I assume the evaluator is feeding it A and B and it doesn't recognize if you change the input variable names.

CHIP And16 {
    IN a[16], b[16];
    OUT out[16];

    PARTS:
    Nand(a=a[0] , b=b[0] , out=in0);
    Nand(a=a[1] , b=b[1] , out=in1);
    Nand(a=a[2] , b=b[2] , out=in2);
    Nand(a=a[3] , b=b[3] , out=in3);
    Nand(a=a[4] , b=b[4] , out=in4);
    Nand(a=a[5] , b=b[5] , out=in5);
    Nand(a=a[6] , b=b[6] , out=in6);
    Nand(a=a[7] , b=b[7] , out=in7);
    Nand(a=a[8] , b=b[8] , out=in8);
    Nand(a=a[9] , b=b[9] , out=in9);
    Nand(a=a[10] , b=b[10] , out=in10);
    Nand(a=a[11] , b=b[11] , out=in11);
    Nand(a=a[12] , b=b[12] , out=in12);
    Nand(a=a[13] , b=b[13] , out=in13);
    Nand(a=a[14] , b=b[14] , out=in14);
    Nand(a=a[15] , b=b[15] , out=in15);
    Nand(a=in0 , b=in0 , out=out[0]);
    Nand(a=in1 , b=in1 , out=out[1]);
    Nand(a=in2 , b=in2 , out=out[2]);
    Nand(a=in3 , b=in3 , out=out[3]);
    Nand(a=in4 , b=in4 , out=out[4]);
    Nand(a=in5 , b=in5 , out=out[5]);
    Nand(a=in6 , b=in6 , out=out[6]);
    Nand(a=in7 , b=in7 , out=out[7]);
    Nand(a=in8 , b=in8 , out=out[8]);
    Nand(a=in9 , b=in9 , out=out[9]);
    Nand(a=in10 , b=in10 , out=out[10]);
    Nand(a=in11 , b=in11 , out=out[11]);
    Nand(a=in12 , b=in12 , out=out[12]);
    Nand(a=in13 , b=in13 , out=out[13]);
    Nand(a=in14 , b=in14 , out=out[14]);
    Nand(a=in15 , b=in15 , out=out[15]);
}