Hardware Simulator is not loading my edited chip

[Idrisadeniyi]

Good day,

Anytime i load an unedited chip into the hardware simulator, it will load properly without any errors.
However, if i load a hdl file after editing it in notepad or notepad++, the hardware simulator will show "loading chip..." at the bottom of the simultor's interface but will not load the file.

please help.

 

[WBahn]

What edits did you make to the file?

What happens if you just open a fresh copy of the file, add a space to a comment, save the file, and then load the file into the simulator?

Are you loading the edited file in any way differently than the original? Is it in the same folder? Were any changes made in any way to any other files in the folder? Where any files added or removed from the folder?

[Idrisadeniyi]

I have been able to successfully load the edited file. The problem was because i didn't start to build my chips in the prescribed order, and i was using an And chip to build an And chip.

However, i still have a little confusion. it was in one of the replies on this forum i got a solution to the above problem. I learnt that i have to start off building my chips with the Not chip and its Parts will contain the specification of Nand.

So i was wondering how i could build a Not chip using Nand specification.

Thank you.

[WBahn]

What do you mean "contain the specification of Nand". Could you link to the post you found this in?

I think it might have meant to say that the Parts section of the Not gate will use only Nand gates to implement the Not functionality.

[Idrisadeniyi]

Yes! you are right. I used the wrong words.

But the problem is that I have no idea how I could possibly implement a Not gate using a Nand gate.

A hint will be appreciated.

[WBahn]

Write the truth table for a Not gate.

Now write the truth table for a Nand gate.

The Nand gate has two inputs while the Not gate only has one.

If you use the Not gate input as one of the Nand gate inputs, can you figure out what you could do with the other input in order to get the Not behavior at the output?

[Idrisadeniyi]

Yes. but implementing that with the Nand gate is the problem.

[WBahn]

Idrisadeniyi wrote

Yes. but implementing that with the Nand gate is the problem.

Yes. Take a Nand gate and apply the input (for the Not gate that you are trying to build) to one of the two Nand gate inputs.

Now do something with the other input to that Nand gate such that the output of the Nand gate is always the opposite of the Not gate input.

For instance, what if our starting part was an Xor chip?

a b Xor
0 0  0
0 1  1
1 0  1
1 1  0

What if I take my Not input apply it to the 'a' input of my Xor chip? I now have

in b Xor
0  0  0
0  1  1
1  0  1
1  1  0

What happens if I force the 'b' input to be LO? I get

in b Xor
0  0  0
1  0  1

What happens if I force the 'b' input to be HI? I get

in b Xor
0  1  1
1  1  0

Does one of those have the behavior that I'm looking for in a Not gate?

[Idrisadeniyi]

Thanks a lot. Your explanation helped. I figured it out. I really appreciate!