Implementation of the logic gates in chapter 1

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Implementation of the logic gates in chapter 1

 Hello all, I have just got this book and am currently working on the project for chapter 1. I have implemented all of the gates just by thinking about how it would work until I got to Xor, for Xor I used the diagram in the chapter to build it. I tried to think about how to make the Mux but couldn't figure it out, so since there was no diagram I had to use canonical representation with the truth table to build it. The resulting gate is huge with 3 Not gates, 8 And gates, and 3 Or gates. Is using canonical representation the intended approach we use, or should I use a different approach to be more efficient.
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Re: Implementation of the logic gates in chapter 1

 I've also read a little about simplifying boolean expressions but still don't quite understand the process. Could someone give me an example of the thought process for simplifying this expression: F(x, y, z) = xy'z' + xyz' + x'yz + xyz Thanks.
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Re: Implementation of the logic gates in chapter 1

 In reply to this post by BrandonK Hello there, Yeah, you can use the canonical representation of implementing the chips. But sometimes it leads to lengthier code writing. Instead you can go with Karnaugh Map representation where most of the times the Boolean expression will be quite simplified. But if you feel comfortable with the canonical representation, try to simplify the obtained Boolean expression using the Laws of Boolean Algebra. This results in the same functioning of the chip but it will reduce the time required for code writing and also reduces the code length, in contrast to the original expression which takes a lot of time to code. - Sparky.