Memory implementation incorrect but passes test script

[kaganovich]

I think the Memory test script has a problem.
If I implement Memory.hdl like this:

        RAM16K(in=in,load=load,address[0..13]=address[0..13],out=ramOut);
        Screen(in=in,load=load,address=address[0..12],out=screenOut);
        Keyboard(out=kbdOut);
        Mux4Way16(a=ramOut,b=ramOut,c=screenOut,d=kbdOut,sel=address[13..14],out=out);

The test script will pass, but it is posible in case load==1 that the Screen and the RAM will be effected undesirably.
Am I right?

[cadet1620]

See this post for Memory test files that do more detailed testing and detect addressing and cross-read/write problems.

--Mark

[shidaway]

I used And- and Not-gate to establish the condition that it only loads when load And the particular bit fulfill the condition.