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Please help clarify why I'm running into a comparison failure in the following multiplexer implementation.
So far, I have tried two options but none of them seems to work.
The comparison failure keeps occurring at the same point for both logic.
CHIP Mux {
IN a, b, sel;
OUT out;
PARTS:
// Put your code here:
//Not (in=sel, out=nots);
//And (a=a, b=nots, out=x);
//And (a=a, b=sel, out=y);
//Xor (a=x, b=y, out=out);
}
CHIP Mux {
IN a, b, sel;
OUT out;
PARTS:
// Put your code here:
Nand(a=a, b=b, out=x);
Not(in=x, out=out);
}
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Administrator
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Please, we are not mind readers. If you are having a comparison failure, it is extremely helpful if you tell use WHAT comparison failure you are having. The best way to provide this is to tell us what line the comparison failure is occurring on then then showing the output from your chip on that line as well as the reference output in the comparison file on that line.
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Administrator
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There's no reason to think that your second one has a chance of working. Notice that the sel input isn't even used. Since the behavior of the Mux is influenced by the state of the sel input, any design that doesn't use it is doomed from the start.
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Administrator
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Your first part has nothing in it -- all of the parts are commented out. So of course it doesn't work.
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Alright, Thanks for your reply.
As matter of fact, the very first issue I have is with the comparison file provided for the Mux gate. The supplied comparison file is contradictory to the one taught in the course.
| a | b | sel | out |
| 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 0 |
| 0 | 1 | 0 | 0 |
| 0 | 1 | 1 | 1 | The comparison file is repeating its input value twice for each input pin except for sel.
| 1 | 0 | 0 | 1 | This is not consistent with the truth table provided in the
| 1 | 0 | 1 | 0 | course for Mux gate.
| 1 | 1 | 0 | 1 |
| 1 | 1 | 1 | 1 |
Are my suppose to implement it just as it's provided or there might be something wrong with the file? in other words, is the comparison file wrong or not?
Secondly, The following the hdl was not actually commented out in the Hardware Simulator during execution. I commented it because I was trying some other logic.
CHIP Mux {
IN a, b, sel;
OUT out;
PARTS:
// Put your code here:
//Not (in=sel, out=nots);
//And (a=a, b=nots, out=x);
//And (a=a, b=sel, out=y);
//Xor (a=x, b=y, out=out);
}
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Administrator
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This post was updated on .
I'm not following what you are saying about the comparison file.
The comparison file, in general, is NOT a truth table (it happens to be in this case).
There is a test file that applies some stimulus and then records some output in the .out file. For each stimulus, there is a line in the .out file.
The comparison file is merely the output file produced when running the test script on a known good design.
The test script for the Mux exercises every possible combination of the three inputs, which means there are eight tests that it performs. I think what you are seeing as the input values repeating twice is simply that for a give value of 'a' and 'b', a test is run with 'sel' = 0 and another test is run with 'sel' = 1.
The tests could have been run in any order. For instance, four tests could have been run with 'sel' = 0 followed by four tests run with 'sel' = 1.
What line is the simulator saying that it fails on? My guess is that it is saying Line 5.
If so, look at line 5 in the file
Mux.cmp
| a | b | sel | out |
| 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 0 |
| 0 | 1 | 0 | 0 |
| 0 | 1 | 1 | 1 |
I expect that your output file looks like this:
Mux.out
| a | b | sel | out |
| 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 0 |
| 0 | 1 | 0 | 0 |
| 0 | 1 | 1 | 0 |
So, when a=0, b=1, and sel=1, what should the output be?
Walk through your code, as it is actually written, and see what the value of all of the internal signals {nots, x, y} are for that set of inputs and what output it is producing. You will find that your code is producing a 0.
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