Need help understanding and breaking down the CPU

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Need help understanding and breaking down the CPU

nblackburn
This post was updated on .
I have been stuck on trying to break down the implementation of the CPU. This probably stems from a lack of understanding.

I have tried cadet's advice on printing out several copies of the CPU diagram and taking notes on them to try to understand it but am still not really sure where to go from here.

What I think I understand so far is that in the case of a C-instruction (MSB == 1), the d bits are used to determine which registers accept the ALU output, the j bits are used to determine which instruction to fetch next, the ALU output is loaded into the A register, and the six c bits of the instruction are used to compute the calculation to be executed by the CPU and the a-bit determines wether the ALU will be fed the output from the A-register or the inM input. In the case of a A-instruction the instruction is loaded into the A-register.



I have watched part of Simon Schockens video on it <nabble_embed>https://www.youtube.com/watch?v=OXK_vzk7cUU&list=PLrDd_kMiAuNmSb-CKWQqq9oBFN_KNMTaI&index=38</nabble_embed> and have drawn the image above to try to break down the section which decodes and deals with the current instruction.

I could use some guidance on how to break this down into small, managable steps or just some guidance since I assume my understanding is incorrect.
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Re: Need help understanding and breaking down the CPU

nblackburn
This post was updated on .
I have broken it down into the different sections in the YouTube video I had mentioned in the original post. I am now going to start implementing the CPU.

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Re: Need help understanding and breaking down the CPU

WBahn
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In reply to this post by nblackburn
nblackburn wrote
What I think I understand so far is that in the case of a C-instruction (MSB == 1), the d bits are used to determine which registers accept the ALU output
Correct.

the j bits are used to determine which instruction to fetch next
Yes and no. The j bits in conjunction with the ALU output, merely determine whether or not a jump is made. The 'which instruction' is determine by either the PC (if the jump is not made) or the A-register (if the jump is made).

the ALU output is loaded into the A register, and the six c bits of the instruction are used to compute the calculation to be executed by the CPU and the a-bit determines wether the ALU will be fed the output from the A-register or the inM input.
Whether the ALU output is loaded into the A-register depends on the status of the d bits (as you mentioned previously).

In the case of a A-instruction the instruction is loaded into the A-register.
Yes, and it is important to ensure that this is the ONLY thing that happens with an A-instruction. That is an easy-to-overlook aspect of the instruction decoding.

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Re: Need help understanding and breaking down the CPU

nblackburn
I have made the CPU now. I basically just kept breaking it down, getting it all completely wrong and then fixing it one step at a time.

One tip I would have for anyone who is struggling to realise the CPU is to first watch the YouTube video I had linked in a previous post in this thread in order to divide the CPU into the different sections. Then I would recommend realising the sections from first working out the current instruction, then the operation of the ALU and then the conditional logic. Use the diagram I drew as a reference or starting point. Leave the conditional logic to the end, and then break down the conditional logic by first working out the jump conditions for each jump, and then combine the conditions to be used as the load and increment bit of the PC.
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Re: Need help understanding and breaking down the CPU

pm100
first - start with the ALU, this is the core.

it has 2 inputs
- the D register
- then a choice of the A register or the memory word addressed by the A register (aka M), this controlled by the 'a' bit. This is what selects between the first 2 columns in fig 6.2. Note that the first column has no Ms in it, everything operates on the conents of the A and D registers, second column is all about the D reg and M

It has one output. This output is fed to any of
- A reg
- D reg
- M - memory cell refernced by A
The selection is driven by the 3 'd' bits

Finally there is a jump. Normally the PC increments by one each clock tick. But if any of the j bits are set in the instruction then depending on the status bit outputs of the ALU (zr - zero and ng - negative) the PC will jump to the address in the A register