Or 8 Way's output?

[William DesLauriers]

I am really stuck on the Or 8 Way section. Based on a page 26 of the Chapter 1 of "The Element of Computing Systems, Multi-Way Gates: Implementation tip: Think forks. Is what you tried to tell me? Then, I determined to design the Or 8 Way circuit picture and post it here. Also, I tried to read A.5.3 of the same book above, I did not get it since it was too vague to understand. I am a self-learner and an old gentleman. Thank you very much in advance. Wm

[cadet1620]

You need an "Or4Way" to combine your 4 Or outputs, but you don't need to create an actual Or4Way chip unless you want to. You can include its implementation in the Or8Way.

--Mark

[William DesLauriers]

Or8Way.hdl I ran the Hardware Simulator and loaded the hdl file. The red line showed me, "... Line 17, a(1) and (8) have different bus widths...". What went wrong with this file? Thanks, Wm

[William DesLauriers]

One more thing, would you put .tst and .cmp files for the Or4Way implementation someplace else than this public forum?
Wm

[cadet1620]

The Or chip only works with single bit signals. When you write Or(a=in[0..7], you are trying to connect 8 wires to a single input pin.

Also, you have 4 parts that have "=out" so you are trying to connect 4 different wires to the single output wire from the Or8Way.

Your drawing is much closer to correct then this .hdl file. You need 4 Or gates, one for each one in your drawing.  They need to create the internal wires or0, or1, or2, or3 as you named them. Then you need 2 Or gates, one that combine or0 and or1, and one that combines or2 and or3., then you need ...

What you are trying to achieve is:

    out = in[0] + in[1] + in[2] + in[3] + in[4] + in[5] + in[6] + in[7]

But the Or operator (gates) only take 2 arguments so you need to put a bunch of parentheses in that expression:

    out = ( (in[0] + in[1]) + (in[2] + in[3]) ) + ( (in[4] + in[5]) + (in[6] + in[7]) )

--Mark

[cadet1620]

William DesLauriers wrote

One more thing, would you put .tst and .cmp files for the Or4Way implementation someplace else than this public forum?
Wm

If you wrote Or4Way .tst and .cmp files, it would be appropriate to post them to this forum.  You might want to post them in their own topic titled something like "Or4Way test files".

--Mark

[William DesLauriers]

No problem on the Or 4 Way. I will create a new forum. I am working on it.

[William DesLauriers]

On the Or4Way test, it's done!

[William DesLauriers]

Mark, Or8Way.hdl The Hardware Simulator showed me in its red line," Comparison failure at line 3". What went wrong at this time? Wm

[cadet1620]

You do not have anything connected to the Or8Way's 'out' pin, so the output is always equal to 0.

Hints:

Your Or8Way needs 7 Or parts.

How would you write
    out = ( (in[0] + in[1]) + (in[2] + in[3]) ) + ( (in[4] + in[5]) + (in[6] + in[7]) )
in a programming language that did not allow any parens or multiple '+' in an expression?
    a = in[0] + in[1];
    b = in[2] + in[3];
    ...
    out = x + y;

--Mark

[William DesLauriers]

I was wrong with my original graphic view of the Or8Way.  I figured it out on my own by drawing it out on a piece of a paper after reading a hint and meditating on it.  There should be two OR gates on the left side of the original drawing's four Ors.  Then lone OR following by.  Therefore, it works GREAT!  Whew!
Thanks cadet1620 (Mark)!
Wm