There isn't a simpler way in HDL; you must have a Not line for each bit.
You have the right idea about hardware. Whether it's inside an IC or connections between ICs there is a wire for each bit. The signals are usually named individually, for instance DB0, DB1, etc. but are drawn on schematics as heavier lines indicating buses and labeled as such.
Note that the gates for individual bits may not be closely arrayed on the chip, depending on the function of the bus. It might be better for the layout to have them closer to other related circuitry, than to each other.
It is possible to have more than two inputs to a Nand gate, but that makes it an n-way gate, not multi-bit. Not gates often are just 1-input Nand gates.
Here's an snippet from the schematic from one of my current projects.
--Mark