Leroy wrote
Do you have any pictures of the multi-bit gate(s) along with maybe an example of the proper hdl syntax to represent the gate(s)?
To paraphrase the text, Not16 does a Not for each wire of the
in and
out buses.
This means your Not16.hdl will require 16 Not part lines in the form
Not (in=
something, out=
something);
Read Appendix A.5.3 to learn about bus wire selection syntax.
--Mark