Problem with GateClass?

[Tholomai]

I built the Bit, but when I try load this chip in Hardware Simulator, appear a problem. It is error: "A GateClass name is expected". This problem appear in line "CLOCKED in, load;". I have no idea what  does it mean. Can someone help me?

This is Chip I wrote:

CHIP Bit {

    IN  in, load;
    OUT out;

       
        PARTS:
        Mux(a=in, b=out1, sel=load, out=x1);
        DFF(in=x1, out=out1);
        And(a=out1, b=true, out=out);
       
        CLOCKED in, load;
       
       
}

[Shimon Schocken]

Get rid of the "CLOCKED in,load" statement. This chip inherits its CLOCKED-ness from the DFF chip part, so there is no need to declare CLOCKED again. -- Shimon

[Dylan McCall]

Hey, Tholomai: your code snippet demonstrated to me that HDL works non-sequentially. I didn't realize that :)
(I probably should have noticed before I did the ALU...).

Anyway, here's a tip for you as a reward, just in case you didn't notice!
You can connect an output from a chip to multiple other pins. For example, out=b, out[15]=c.

In the spirit of the book's teaching style, I won't tell you exactly how, but you can remove that extra And from your chip.

[antpocas]

You can fan out the output of a gate to more than one internal pin, so you can just do DFF(in=x1, out=out1, out=out); and eliminate that And :)