Let's look at the first 5 lines of the CPU compare file:
|time| inM | instruction |reset| outM |writeM |addre| pc |DRegiste|
|0+ | 0|0011000000111001| 0 |*******| 0 | 0| 0| 0 |
|1 | 0|0011000000111001| 0 |*******| 0 |12345| 1| 0 |
|1+ | 0|1110110000010000| 0 |*******| 0 |12345| 1| 12345 |
|2 | 0|1110110000010000| 0 |*******| 0 |12345| 2| 12345 |
The D Register is a sequential chip, right? So why isn't its value 0 at t=1+, and only 12345 at t=2? I thought that logic only propagated on the tock.
I must be misunderstanding something, but I'm not sure what. Can anyone explain?