Style matters

[tsturgeonwrites]

For my And16, I just cut and pasted 16 and gate components and changed the indexes.

Another approach might have combined 8 or 4 bit And gates; is there a preference?

How does this affect how to simulation works, if one used self-designed rather than included components?

[WBahn]

The general preference is to build functional blocks out of slightly smaller functional blocks, but for something like building a large And out of smaller Ands that are built from yet smaller Ands, the value of doing so is pretty dubious. There's no "right" or "wrong" on this one. The idea is match the parts to a functional concept, such as an "Adder" or a "Register" or a "Multiplexer".

As for the simulation, that depends on how the simulator loads the design. If it loads the design all the way down to the primitive level, then there's no difference. If it maintains each part as a separate entity throughout the simulation, then there can be significant memory savings by having more layers of part definitions, but there can also be a performance penalty as the part tree is navigated over and over throughout the simulation.

If you actually build the hardware, then having excessive layers of abstraction can hurt performance because it is more likely that such a design will result in longer logic chains than is truly necessary. This is often seem with decode logic, for instance. So it's a balancing act.