hacker wrote
When defining a Mux Chip I thought that I could implement it using just 2 Ands and 1 Not chips, but I quickly figured out that HDL doesn't allow me to mix multiple outputs from many of chip parts into one out pin, given "an output pin may only be fed once by a part's output". Why? In a real world it seems to be a common practice to wire together multiple pins so we get ONE (or True) when at least one of the internal chips produces ONE. But I'm forced to use ORs to combine outputs.
No, that is not common practice. If you connect two active outputs together, then they will be in "contention" -- one is trying to source enough current in order to establish a high voltage on that node while the other is trying to sink enough current to establish a low voltage on that node. Which one wins?
In order to use a "wired-OR" (or a "wired-AND") approach, you must design the parts to ensure that the contention is resolved they way you want. One way is to make the gates so that they can ONLY pull up or ONLY pull down (the latter being the more common). Another is to make the drive strengths in the two directions asymmetric so that the "winner" is deterministic (and that the system can handle the ongoing battle as they fight).
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