Yet Another DMux4Way Question

[salmoneus]

I've read most of the past forum discussions and the advice about "mirroring Mux" as well as seeing how cadet1620 branched the implementation of the DMux4Way to show the 3 forks requiring 3 individual DMux chips.

My problem is that I don't understand how to reference the outputs of my individual DMux chips in my DMux4Way HDL implementation. For example, I know that the first branch of the DMux4Way is to DMux into two subsets of the full output set {a,b,c,d} --> {a,b} + {c,d}. Then it seems obvious as well how to individually DMux these two subsets to get the individual output.

I think my problem is understanding how to reference the output of the first DMux branch ({a,b,c,d} --> {a,b} + {c,d}).

Did I make any sense? Anybody else who's been through this same issue?

Thanks in advance.

[WBahn]

It will probably help you a lot if you draw a schematic of what you are trying to do. Then you should see that you have some internal signals the feed from the output of one part to the input of another part. You simply assign a name (one that isn't being used elsewhere) to these signals.

If your first level of DMux parts result in two signals, one of which is signals a & b and the other of which is signals c & d, then you might call them "ab" and "cd".