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i dont understand, before trying to implement it, i like to look at the builtin chips functioning. But it only accepts 0 or 1, so i cant choose between all four 16 bit buses.. what am i missing?
as for the implementation, is it possible with 2 mux16's and one mux ? the mux to choose between the two mux16s? i haven;t thought about it much yet as i want to make sure i understand how the chip is supposed to function first
Even more confusing, i just ran the tst file against it and it failed?!
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Administrator
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pwolf wrote
i dont understand, before trying to implement it, i like to look at the builtin chips functioning. But it only accepts 0 or 1, so i cant choose between all four 16 bit buses.. what am i missing?
Assuming that you are talking about setting the sel[2] input in the Hardware Simulator, it's a decimal number. You can set it to '2' or '3'.
Or set View>Binary, and you will get a binary editor when you double click on the value.
as for the implementation, is it possible with 2 mux16's and one mux ? the mux to choose between the two mux16s? i haven;t thought about it much yet as i want to make sure i understand how the chip is supposed to function first
Since the output of the Mux16s is 16 bits wide, you need to use a Mux16 to select between their outputs.
Even more confusing, i just ran the tst file against it and it failed?!
The test loads the Mux4Way16.hdl from the directory when the .tst file is. This replaces whatever chip was previously loaded in the simulator. Unless you changed something, this would be the supplied skeleton file with no implementation.
--Mark
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AH! im a moron sometimes, thank you for the help !
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im struggling to find a solution to the 4waymux16, can you offer some tips or something?
I'm confused about the selector bits, i thought at first of doing it the same way you would do a multi-way and gate for example, piping hte output from one mux16 to the next mux16, so i drew 3 mux16's connecting outputs to inputs, but that way you would have 3 selector bits. and so it doesn't seem to be right.. the other way i thought was a mux16 for a and b, a mux 16 for c and d and their outputs going to a 3rd mux16. which is also evidently wrong... im really struggling to wrap my head around this..
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I think i might be on to a winner, if i use the same select bit for the first two mux16s the the sel for the 3rd as sel[1] i think that could work out?
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Administrator
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You are on the right track.
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I managed to solve the 4 way and 8 way multiplexors, but im stuck on the multiway dmux. I figured i could do much the same as with the mux, i drew a diagram using a dmux with its input as sel[0] and its sel a sel[1] which chooses between dmux a& b and dmux c&d , which seemed to make logical sense at first. I figured i could wire the input to go to both and then using the first dmux i could select which would be activated.. but im beginning to think that is totally wrong, the dmux will set a value in both second level dmuxes regardless. Am i on the wrong track thinking to use a dmux as both selector bits? should i be looking for something similar to the mux's ?
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I think i have my solution but im confused when writing the hdl for it. I want to have a dmux that filters the input to either the dmux for a and b or the dmux for c and d, using sel[1]. THen using sel[0] as the sel for both 2nd layer dmuxs, choose between a or b and c or d.
So far i have written :
CHIP DMux4Way {
IN in, sel[2];
OUT a, b, c, d;
PARTS:
// Put your code here:
DMux(in = in , sel = sel[1], a = a, b = b );
DMux(in = in, sel = sel[0], a = a, b = b );
DMux(in = in, sel = sel[0], a = c, b = d );
i have no idea how to use the dmux, before the outputs have always just been output , im struggling to get my head around it
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Administrator
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Muxes and demuxes are mirror images of each other, so your fundamental idea is sound. You need to figure out which sel controls which demuxes.
In fact, in the old days of relay circuits, mux and demux were identical circuits since electricity can flow either direction through relay contacts.
--Mark
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Administrator
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Change the names of the outputs from the first demux and it may be clearer what needs to happen:
DMux(in = in , sel = sel[1], a = aORb, b = cORd );
The second rank of demuxes then needs to demux aORb and cORd to their final outputs.
--Mark
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I capitalized the a and b in the 2 dmux and it loaded and passed the test, but i will rename it more sensibly as you have suggested here! thank you for all your help
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I named the out puts of first two Mux16 as w1 and w2. When I enter w1 and w2 to the third Mux16 as inputs I get the following error. “Sub bus of an internal node may not be used”!
But I am sure that the internal pin has worked as inputs in previous chips I coded. What could be wrong here?
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Administrator
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manu wrote
I named the out puts of first two Mux16 as w1 and w2. When I enter w1 and w2 to the third Mux16 as inputs I get the following error. “Sub bus of an internal node may not be used”!
But I am sure that the internal pin has worked as inputs in previous chips I coded. What could be wrong here?
This message usually means that you tried to do something like
Not16(in=in, out=w1);
Not(in=w1[7], out=w2); // set w2 = ~(in[7])
Your error may be referring to something about the Mux16's 'sel' input instead of w1 or w2?
--Mark
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Thank you for your reply.
I still have no idea what caused the error. I managed to complete Mux4way16 using some some alternate code. (idea still being using 3 Mux). Then using Mux4way16 completed Mux8way16 as well.
Is it ok if I email you the initial code in which I had the error?
Thanks again. Manu.
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Administrator
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manu wrote
Is it ok if I email you the initial code in which I had the error?
Yes, feel free to email me your code.
--Mark
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Locked
