Re: De-bus pins?

Posted by cadet1620 on
URL: http://nand2tetris-questions-and-answers-forum.52.s1.nabble.com/De-bus-pins-tp2802816p2929817.html

cadet1620 wrote

FWIW, I have this layer of ANDs in my CPU, but they AND with instruction[15].  Although not necessary for the Hack CPU, experience makes me qualify all the C-instruction control signals so that they are in a defined state during A-instructions.

I've started experimenting with adding another instruction to Hack, and I realize that I should have qualified all these control signals with cinstr, where cinstr = instruction[13] AND instruction[14] AND instruction[15].

C-instructions have the top 3 bits all 1 per 6.2.2, but my new instruction has bit 13 = 0 and doesn't want all those C-instruction control signals active.

--Mark