Trouble with multibit gates

Posted by paintchip on
URL: http://nand2tetris-questions-and-answers-forum.52.s1.nabble.com/Trouble-with-multibit-gates-tp3326308.html

Hey guys, I am having a lot of trouble implementing the not16 and and16 gates. However, I think my problem is a syntax one. I am trying to implement the gates by using 16, 1 bit, gates with the syntax; And(a=a[0], b=b[0], out=out[0])..... I have tried several different ways and read Appendix A "buses" a few times, but I still can't get it right. The test scripts keep giving me the failed comparison line. I am getting frustrated with my inability to understand this small part of the HDL language. Can somebody please show me how to properly connect 1 bit from a multibit input to a single bit chip and then send the output to a multibit output? If this is even how I'm supposed to do it :D