Re: Building chips problem.

Posted by cadet1620 on Oct 31, 2011; 9:24pm
URL: http://nand2tetris-questions-and-answers-forum.52.s1.nabble.com/Building-chips-problem-tp3468285p3469095.html

GustavoB wrote

I understand. I've been researching about HDL, the most used languanges are the Verilog and VHDL, acording to wikipedia. I just don't know if the logical functions on Verilog or VHDL will work on the hardware simulator, but i'm going to try that now.

TECS HDL is a very simple-minded language.  Verilog and VHDL constructs will not work.  Exactly what's documented in Appendix A, no more, no less.

--Mark