Re: confused on Figure 1.6 implementation of Xor gate

Posted by ErikY on
URL: http://nand2tetris-questions-and-answers-forum.52.s1.nabble.com/confused-on-Figure-1-6-implementation-of-Xor-gate-tp3706181p3708899.html

I understand the wiring concept.

the part I cant get for the life of me, and I have been looking at this for 2 days, is how to translate

(Nota and b) or (Notb and a)

to

Not(In=a, out=nota);
Not(In=b,out=notb);
And(a=a, b=notb, out=w1);
And(a=nota, b=b, out=w2);
Or(a=w1, b=w2, out=out);

Does that have to be done by creating the gate diagram, and then creating the HDL off of the gate diagram?

OR, is there an algebraic, or logical pathway I can take to get to the HDL above without the gate diagram?

I am struggling with how to create that gate diagram from the canonical representation.

sorry for being dense.