Re: Building chips problem.

Posted by cadet1620 on
URL: http://nand2tetris-questions-and-answers-forum.52.s1.nabble.com/Building-chips-problem-tp3468285p3812841.html

Canonical representations are very mechanical; there isn't much there to feel. If the true outputs were holes in a in a dam, you plug each hole and the dam stops leaking. Don't get hung up on becoming a Karnaugh Map expert; they are of limited use beyond chapter 1.

From your description of addition, it sounds like you are a visual learner. You might want to play with LogiSim, http://ozark.hendrix.edu/~burch/logisim. It's a visual digital logic simulator.  You will still need to translate the circuits you build in LogiSim to HDL to use them with TECS.

If your questions are on a different subject, it is better to start a new post.  This will help other people who have the same question find the discussion of their problem.

--Mark