Truth Tables and resulting outputs...

Posted by echoes on
URL: http://nand2tetris-questions-and-answers-forum.52.s1.nabble.com/Truth-Tables-and-resulting-outputs-tp3904544.html

I have created chips for the first group of chips: AND, OR, NOT, XOR.  I'm attempting to move onto the Mux.

I understand the truth table at a basic level, but for example on Figure 1.8, I do not understand how the "out" column was determined.

I understand that you have 2 1-bit inputs and a selection bit.  If I were to draw out the truth table, I might have something like this:

A B S OUT
0 0 0 ?
0 0 1 ?
0 1 0 ?
0 1 1 ?
1 0 0 ?
1 0 1 ?
1 1 0 ?
1 1 1 ?

A = input 1
B = input 2
S = "selector" bit
OUT = result of the boolean expression/algebra of this multiplexer gate as a whole

(NB I could rearrange this truth table visually so S bits with a value of "0" are grouped together and "1" are grouped together for easy reading, of course).

What I don't understand is: How am I to determine what the OUT is *supposed* to be, with regard to the Multiplexer chip as asked for at Chapter 1 page 20 (specifically the top-left of page 21)?  I already see values here under the "out" column, but I'm not sure how these values were determined in order to explain this chip in the first place.

My understanding is that from this truth table, I could take the rows of this table that have the Output value of "1", build a boolean expression, simplify that expression and then attempt to build a visual representation of that expression using logic gates.