Re: Mux Help

Posted by cadet1620 on
URL: http://nand2tetris-questions-and-answers-forum.52.s1.nabble.com/Mux-Help-tp4025778p4025779.html

moarmango wrote

I have gotten up to Mux pretty smoothly, but the introduction of a 3rd input has left me frustrated.  I'm not sure how to even approach this puzzle.  I understand (I think) that the the canonical representation of Mux can be desribed:

X(not)YZ(not)+XYZ(not)+XY(not)Z+XYZ  - Is this starting off point correct? (4 Nots, 8 Ands, 3 Ors)

Your canonical expression for Mux is correct, but it would be clearer to use the actual signal names and write it as
    out = a b sel + ~a b sel + a ~b sel + a b ~sel.
Search the forum for "Karnaugh map" to learn about a tool that can help you simplify the canonical expression.

Up till now, all the Parts have been with 2 inputs that Nand and others have in its parameters.  Can Nand, Not, And, Or, and Xor have more than 2 inputs intrinsically?  In the Mux template there are 3 inputs, just having trouble on how to reconcile that with what up until now has been limited to 2 inputs.  During the Test, how is the third input incorporated if all the parts accept only 2 inputs?  Any guidance is sincerely appreciated.

Suppose that you want to write a 3-input And gate. It will have three declared inputs
    INPUT a, b, c;

And the HDL that implements out = (a b)c would be
    And (a=a, b=b, out=ab);
    And (a=ab, b=c, out=out);

The And.tst script would have lines in it like
    set a 0, set b 1, set c 0,
    eval, output;
that manipulate the 3 inputs to the chip.

--Mark