Re: "Not" gate always outputting 1

Posted by WBahn on
URL: http://nand2tetris-questions-and-answers-forum.52.s1.nabble.com/Not-gate-always-outputting-1-tp4034542p4034548.html

hkva wrote

Alright, I tried the following code and now the outputs seem to be the opposite of what they should be:

CHIP DMux4Way {
    IN in, sel[2];
    OUT a, b, c, d;

    PARTS:
    // Put your code here:
    Not(in=sel[0], out=notsel0);
    Not(in=sel[1], out=notsel1);
    And(a=notsel0, b=notsel0, out=a);
    And(a=notsel1, b=notsel1, out=b);
}

When "sel" is 01, a is 0 and b is 1. Shouldn't it be the opposite? Routing the Not operations directly to the A and B pins gives the same output.

Here's a screenshot of the hardware simulator: https://i.imgur.com/pDLRmmO.png

I don't see the problem.

If sel = 01, the sel[0] = 1 and sel[1] = 0. That means that notsel0 = 0 and notsel1 = 1. That means that a = 0 and b = 1, which is what you are seeing.