Chapter 1 efficiency considerations

Posted by goofballlogic on Jul 11, 2020; 11:25am
URL: http://nand2tetris-questions-and-answers-forum.52.s1.nabble.com/Chapter-1-efficiency-considerations-tp4034841.html

With regard to the exercises in Chapter 1, I'm slightly confused about whether the goal is to implement all chips using just nand gates, or whether to compose logic from e.g. and, or, not.

I may be incorrect in my findings but it appears e.g. that I can construct Xor with fewer "raw" nand gates than the number required if i use and, or and not.

Is the goal of the exercises to achieve the most efficient result, or just the easiest implementation?