Re: Comparison Failure for And or Or gates

Posted by Idrisadeniyi on Jan 31, 2021; 7:35am
URL: http://nand2tetris-questions-and-answers-forum.52.s1.nabble.com/Comparison-Failure-for-And-or-Or-gates-tp4035543p4035580.html

That's exactly what I was trying to say. Based on this experience, it's clear that the combination of a Not and Nand gates cannot be used to implement an And gate. This is no longer a confusion for me as I have understood this point very clearly.

However, The challenge now is, it's only the Not gate I have been able to successfully implement; which means that I cannot invoke or make reference to any of the other gates in my And gate as that will not load because one has to adhere to the bottom-up order rules of chips' implementation(e.g, Not before And, and And before Or, etc.) and the Hardware Simulator is programmed to follow these rules.

So, If Nand and Not are the only two gates available to me right now, and I want to implement an And gate  that cannot be implemented with one of those gates(Nand) and I don't see the possibility of an And gate being implemented with only a Not gate. How could I possibly implement this(And) gate in this situation?