Ben wrote
I think Nand gate compose Or gate & Not Gate
Nand(a,b)=~a + ~b ,therefore And=Not(Nand(a,b))=~(~a + ~b)
but I implement using the thinking ,but I always get message from HW
simulator a is not pin in Not
This is correct algebra, and this particular relationship is one of De Morgan's Laws.
Read the
Hardware Construction Survival Kit if you have not done so yet.
When you start out the course, the only Chip that is available to use is Nand. There are no other chips available until you make and test them.
The first chip you need to make and test is the Not chip. You can only use Nand chips in your Not.hdl.
Next make and test your And chip. You can use Nand and Not parts in your And.
Next make and test your Or chip. You can use Nand, Not and And parts in your Or. (Hint: There is a version of De Morgan's law for Nor(a,b) that will help you make And.)
Continue making your chips in the order they are described in the book: Not, And, Or, Xor, Mux, DMux, etc.
As you will see when you make your Not.hdl, the IN and OUT pins for Not are 'in' and 'out'. That's why the simulator is complaining about
It would need to be
Not(<b>in</b>=a, out=nota);
--Mark